Struct raw_cpuid::SgxInfo

pub struct SgxInfo<R: CpuIdReader> { /* private fields */ }

Intel SGX Capability Enumeration Leaf (LEAF=0x12).

Two sub-leafs: (EAX = 12H, ECX = 0 and ECX = 1)

Platforms

❌ AMD ✅ Intel

Implementations

impl<F: CpuIdReader> SgxInfo<F>

pub fn has_sgx1(&self) -> bool

Has SGX1 support.

pub fn has_sgx2(&self) -> bool

Has SGX2 support.

pub fn has_enclv_leaves_einvirtchild_edecvirtchild_esetcontext(&self) -> bool

Supports ENCLV instruction leaves EINCVIRTCHILD, EDECVIRTCHILD, and ESETCONTEXT.

pub fn has_encls_leaves_etrackc_erdinfo_eldbc_elduc(&self) -> bool

Supports ENCLS instruction leaves ETRACKC, ERDINFO, ELDBC, and ELDUC.

pub fn miscselect(&self) -> u32

Bit vector of supported extended SGX features.

pub fn max_enclave_size_non_64bit(&self) -> u8

The maximum supported enclave size in non-64-bit mode is 2^retval.

pub fn max_enclave_size_64bit(&self) -> u8

The maximum supported enclave size in 64-bit mode is 2^retval.

pub fn secs_attributes(&self) -> (u64, u64)

Reports the valid bits of SECS.ATTRIBUTES[127:0] that software can set with ECREATE.

pub fn iter(&self) -> SgxSectionIter<F>

Iterator over SGX sub-leafs.

Trait Implementations

impl<R: CpuIdReader> Debug for SgxInfo<R>

fn fmt(&self, f: &mut Formatter<'_>) -> Result

Formats the value using the given formatter.